A
hardware verification language, or
HVL, is a programming language used to verify the designs of
electronic circuits written in a
hardware description language. HVLs typically include features of a
high-level programming language like
C++ or
Java as well as features for easy bit-level manipulation similar to those found in
HDLs. Many HVLs will provide constrained random stimulus generation, and functional coverage constructs to assist with complex hardware verification.